Description
In this reference design, each port of the Ethernet FMC is connected to an AXI Ethernet Subsystem IP which is connected to the system memory via an AXI DMA IP.

Hardware Platforms
The hardware designs provided in this reference are based on Vivado and support a range of FPGA and MPSoC evaluation boards. The repository contains all necessary scripts and code to build these designs for the supported platforms listed below:
FPGA platforms
Target board |
FMC Slot Used |
Supported |
Standalone |
PetaLinux |
|---|---|---|---|---|
HPC |
4x |
✅ |
❌ |
|
HPC |
4x |
✅ |
❌ |
|
LPC |
4x |
✅ |
❌ |
|
LPC & HPC |
8x |
✅ |
❌ |
|
HPC1 |
4x |
✅ |
❌ |
|
HPC2 |
4x |
✅ |
❌ |
|
HPC2 & HPC1 |
8x |
✅ |
❌ |
|
HPC |
4x |
✅ |
❌ |
|
HPC |
4x |
✅ |
❌ |
|
LPC |
3x |
✅ |
❌ |
|
LPC & HPC |
7x |
✅ |
❌ |
|
HPC0 |
4x |
✅ |
❌ |
|
HPC1 |
4x |
✅ |
❌ |
|
FMCP |
4x |
✅ |
❌ |
Zynq-7000 platforms
Target board |
FMC Slot Used |
Supported |
Standalone |
PetaLinux |
|---|---|---|---|---|
LPC |
4x |
✅ |
✅ |
|
LPC |
4x |
✅ |
✅ |
|
LPC |
4x |
✅ |
✅ |
|
LPC1 |
4x |
✅ |
✅ |
|
LPC2 |
4x |
✅ |
✅ |
|
LPC2 & LPC1 |
8x |
✅ |
❌ |
|
LPC |
4x |
✅ |
✅ |
|
LPC |
4x |
✅ |
✅ |
Zynq UltraScale+ platforms
Target board |
FMC Slot Used |
Supported |
Standalone |
PetaLinux |
|---|---|---|---|---|
HPC |
4x |
✅ |
✅ |
|
HPC0 |
4x |
✅ |
✅ |
|
HPC1 |
2x |
✅ |
✅ |
Software
These reference designs can be driven by either a standalone application or within a PetaLinux environment. The repository includes all necessary scripts and code to build both environments. The table below outlines the corresponding applications available in each environment:
Environment |
Available Applications |
|---|---|
Standalone |
lwIP Echo Server |
PetaLinux |
Built-in Linux commands |