Build instructions
Source code
The source code for the reference designs is managed on this Github repository:
To get the code, you can follow the link and use the Download ZIP option, or you can clone it using this command:
git clone https://github.com/fpgadeveloper/ethernet-fmc-axi-eth.git
License requirements
Some of the designs in this repository target dev boards for which a license is required to generate a bitstream. Others can be built with the Vivado ML Standard Edition without a license. The table of target designs in the following section contains a column specifying which designs require a license, and which can be built without a license.
Target designs
This repo contains several designs that target the various supported development boards and their FMC connectors. The table below lists the target design name, the Ethernet ports supported by the design and the FMC connector on which to connect the mezzanine card.
FPGA designs
Target board |
Target design |
Ports |
FMC Slot |
Standalone |
PetaLinux |
Vivado |
|---|---|---|---|---|---|---|
|
4x |
HPC |
✅ |
❌ |
Standard 🆓 |
|
|
4x |
HPC |
✅ |
❌ |
Enterprise |
|
|
4x |
LPC |
✅ |
❌ |
Enterprise |
|
|
8x |
LPC & HPC |
✅ |
❌ |
Enterprise |
|
|
4x |
HPC1 |
✅ |
❌ |
Enterprise |
|
|
4x |
HPC2 |
✅ |
❌ |
Enterprise |
|
|
8x |
HPC2 & HPC1 |
✅ |
❌ |
Enterprise |
|
|
4x |
HPC |
✅ |
❌ |
Enterprise |
|
|
4x |
HPC |
✅ |
❌ |
Enterprise |
|
|
3x |
LPC |
✅ |
❌ |
Enterprise |
|
|
7x |
LPC & HPC |
✅ |
❌ |
Enterprise |
|
|
4x |
HPC0 |
✅ |
❌ |
Enterprise |
|
|
4x |
HPC1 |
✅ |
❌ |
Enterprise |
|
|
4x |
FMCP |
✅ |
❌ |
Enterprise |
Zynq-7000 designs
Target board |
Target design |
Ports |
FMC Slot |
Standalone |
PetaLinux |
Vivado |
|---|---|---|---|---|---|---|
|
4x |
LPC |
✅ |
✅ |
Standard 🆓 |
|
|
4x |
LPC |
✅ |
✅ |
Standard 🆓 |
|
|
4x |
LPC |
✅ |
✅ |
Standard 🆓 |
|
|
4x |
LPC1 |
✅ |
✅ |
Standard 🆓 |
|
|
4x |
LPC2 |
✅ |
✅ |
Standard 🆓 |
|
|
8x |
LPC2 & LPC1 |
✅ |
❌ |
Standard 🆓 |
|
|
4x |
LPC |
✅ |
✅ |
Enterprise |
|
|
4x |
LPC |
✅ |
✅ |
Standard 🆓 |
Zynq UltraScale+ designs
Target board |
Target design |
Ports |
FMC Slot |
Standalone |
PetaLinux |
Vivado |
|---|---|---|---|---|---|---|
|
4x |
HPC |
✅ |
✅ |
Standard 🆓 |
|
|
4x |
HPC0 |
✅ |
✅ |
Enterprise |
|
|
2x |
HPC1 |
✅ |
✅ |
Enterprise |
Notes:
The Vivado Edition column indicates which designs are supported by the Vivado Standard Edition, the FREE edition which can be used without a license. Vivado Enterprise Edition requires a license however a 30-day evaluation license is available from the AMD Xilinx Licensing site.
Windows users
Windows users will be able to build the Vivado projects and compile the standalone applications, however Linux is required to build the PetaLinux projects.
Tip
If you wish to build the PetaLinux projects, we recommend that you build the entire project (including the Vivado project) on a machine (either physical or virtual) running one of the supported Linux distributions.
Build Vivado project in Windows
Download the repo as a zip file and extract the files to a directory on your hard drive –OR– clone the repo to your hard drive
Open Windows Explorer, browse to the repo files on your hard drive.
In the
Vivadodirectory, double click on thebuild-vivado.batbatch file. You will be prompted to select a target design to build. You will find the project in the folderVivado/<target>.Run Vivado and open the project that was just created.
Click Generate bitstream.
When the bitstream is successfully generated, select File->Export->Export Hardware. In the window that opens, tick Include bitstream and use the default name and location for the XSA file.
Build Vitis workspace in Windows
Before running these steps, you must first build and export the Vivado project as described above.
Return to Windows Explorer and browse to the Vitis directory in the repo.
Double click the
build-vitis.batbatch file. You will be prompted to select a target design. A Vitis workspace with hardware platform and software application will be created for the selected target design. You will find the Vitis workspace in the folderVitis/<target>_workspace.
Linux users
These projects can be built using a machine (either physical or virtual) with one of the supported Linux distributions.
An embedded Linux image can be built with either of two flows: PetaLinux or the
Yocto / EDF flow (AMD’s Embedded Development Framework, the announced successor to
PetaLinux). Both are driven by a single make command and produce an equivalent image — see
build PetaLinux or
build Yocto below.
Attention
The PetaLinux flow for this repository is being retired. Version 2025.2 is the last tool release for which we will support PetaLinux; from the next tool version onward, Linux images will be built with the Yocto / EDF flow only. New work should use the Yocto flow.
Tip
The build steps can be completed in the order shown below, or you can go directly to the build PetaLinux instructions below to build the Vivado and PetaLinux projects with a single command.
Build Vivado project in Linux
Open a command terminal and launch the setup script for Vivado:
source <path-to-xilinx-tools>/2025.2/Vivado/settings64.sh
Clone the Git repository and
cdinto theVivadofolder of the repo:git clone https://github.com/fpgadeveloper/ethernet-fmc-axi-eth.git cd ethernet-fmc-axi-eth/Vivado
Run make to create the Vivado project for the target board. You must replace
<target>with a valid target (alternatively, skip to step 5):make project TARGET=<target>
Valid target labels are:
ac701,kc705_hpc,kc705_lpc,kc705_lpc_hpc,vc707_hpc1,vc707_hpc2,vc707_hpc2_hpc1,vc709,kcu105_hpc,kcu105_lpc,kcu105_dual,vcu108_hpc0,vcu108_hpc1,vcu118,pz_7015,pz_7020,pz_7030,zc702_lpc1,zc702_lpc2,zc702_lpc2_lpc1,zc706_lpc,zedboard,uzev,zcu102_hpc0,zcu102_hpc1. That will create the Vivado project and block design without generating a bitstream or exporting to XSA.Open the generated project in the Vivado GUI and click Generate Bitstream. Once the build is complete, select File->Export->Export Hardware and be sure to tick Include bitstream and use the default name and location for the XSA file.
Alternatively, you can create the Vivado project, generate the bitstream and export to XSA (steps 3 and 4), all from a single command:
make xsa TARGET=<target>
Build Vitis workspace in Linux
The following steps are required if you wish to build and run the standalone application. You can skip to the following section if you instead want to use PetaLinux. You are not required to have built the Vivado design before following these steps, as the Makefile triggers the Vivado build for the corresponding design if it has not already been done.
Launch the setup script for Vivado (only if you skipped the Vivado build steps above):
source <path-to-xilinx-tools>/2025.2/Vivado/settings64.sh
Launch the setup scripts for Vitis:
source <path-to-xilinx-tools>/2025.2/Vitis/settings64.sh
To build the Vitis workspace,
cdto the Vitis directory in the repo, then run make to create the Vitis workspace and compile the standalone application:cd ethernet-fmc-axi-eth/Vitis make workspace TARGET=<target>
Valid target labels for the workspaces are:
ac701,kc705_hpc,kc705_lpc,kc705_lpc_hpc,vc707_hpc1,vc707_hpc2,vc707_hpc2_hpc1,vc709,kcu105_hpc,kcu105_lpc,kcu105_dual,vcu108_hpc0,vcu108_hpc1,vcu118,pz_7015,pz_7020,pz_7030,zc702_lpc1,zc702_lpc2,zc702_lpc2_lpc1,zc706_lpc,zedboard,uzev,zcu102_hpc0,zcu102_hpc1. You will find the Vitis workspace in the folderVitis/<target>_workspace.
Build PetaLinux project in Linux
These steps will build the PetaLinux project for the target design. You are not required to have built the Vivado design before following these steps, as the Makefile triggers the Vivado build for the corresponding design if it has not already been done.
Launch the setup script for Vivado (only if you skipped the Vivado build steps above):
source <path-to-xilinx-tools>/2025.2/Vivado/settings64.sh
Launch PetaLinux by sourcing the
settings.shbash script, eg:source <path-to-petalinux-install>/2025.2/settings.sh
Build the PetaLinux project for your specific target platform by running the following command, replacing
<target>with a valid value from below:cd PetaLinux make petalinux TARGET=<target>
Valid target labels for PetaLinux projects are:
pz_7015,pz_7020,pz_7030,zc702_lpc1,zc702_lpc2,zc706_lpc,zedboard,uzev,zcu102_hpc0,zcu102_hpc1. Note that if you skipped the Vivado build steps above, the Makefile will first generate and build the Vivado project, and then build the PetaLinux project.
PetaLinux offline build
If you need to build the PetaLinux projects offline (without an internet connection), you can follow these instructions.
Download the sstate-cache artefacts from the Xilinx downloads site (the same page where you downloaded PetaLinux tools). There are four of them:
aarch64 sstate-cache (for ZynqMP designs)
arm sstate-cache (for Zynq designs)
microblaze sstate-cache (for Microblaze designs)
Downloads (for all designs)
Extract the contents of those files to a single location on your hard drive, for this example we’ll say
/home/user/petalinux-sstate. That should leave you with the following directory structure:/home/user/petalinux-sstate +--- aarch64 +--- arm +--- downloads +--- microblaze
Create a text file called
offline.txtin thePetaLinuxdirectory of the project repository. The file should contain a single line of text specifying the path where you extracted the sstate-cache files. In this example, the contents of the file would be:/home/user/petalinux-sstate
It is important that the file contain only one line and that the path is written with NO TRAILING FORWARD SLASH.
Now when you use make to build the PetaLinux projects, they will be configured for offline build.
Build Yocto project in Linux
These steps build a Linux image using the AMD Yocto / EDF flow — the announced successor to PetaLinux (see Yocto for the full walkthrough and SD-card flashing). The Yocto flow is supported for the same Zynq-7000 and Zynq UltraScale+ targets as PetaLinux. You are not required to have built the Vivado design beforehand; the Makefile triggers the Vivado build for the corresponding design if it has not already been done.
Attention
The Yocto flow requires Vitis to be sourced (it uses xsct/sdtgen to generate a
System Device Tree from the XSA), and Google’s repo tool
on your PATH. It cannot be built on Windows.
Launch the setup scripts for Vivado and Vitis:
source <path-to-xilinx-tools>/2025.2/Vivado/settings64.sh source <path-to-xilinx-tools>/2025.2/Vitis/settings64.sh
Build the Yocto image for your specific target platform by running the following command, replacing
<target>with a valid value from below:cd Yocto make yocto TARGET=<target>
Valid target labels for Yocto projects are:
pz_7015,pz_7020,pz_7030,zc702_lpc1,zc702_lpc2,zc706_lpc,zedboard,uzev,zcu102_hpc0,zcu102_hpc1. The first build of a target downloads several GB of sources (repo sync) and runs bitbake from scratch, so it takes a while; subsequent builds are incremental. The output products are gathered intoYocto/<target>/images/linux/.
Yocto offline build
The Yocto flow uses the same sstate-cache artefacts as PetaLinux (aarch64 for Zynq UltraScale+,
arm for Zynq-7000, microblaze for the ZynqMP PMU-firmware multiconfig, plus Downloads). Extract
them to a single location as described under PetaLinux offline build,
then create a one-line offline.txt (no trailing slash) in the Yocto directory pointing at
that location. configure-build.sh auto-detects which architecture subdirectories are present and
wires up the corresponding sstate mirrors.